Course Name |
Digital VLSI Design
|
Code
|
Semester
|
Theory
(hour/week) |
Application/Lab
(hour/week) |
Local Credits
|
ECTS
|
EEE 533
|
Fall/Spring
|
3
|
0
|
3
|
7.5
|
Prerequisites |
None
|
|||||
Course Language |
English
|
|||||
Course Type |
Elective
|
|||||
Course Level |
Second Cycle
|
|||||
Mode of Delivery | - | |||||
Teaching Methods and Techniques of the Course | - | |||||
National Occupation Classification | - | |||||
Course Coordinator | - | |||||
Course Lecturer(s) | ||||||
Assistant(s) | - |
Course Objectives | This course covers the design fundamentals of digital VLSI circuits. The MOS transistor theory, CMOS technology will be discussed first briefly. Then circuit characterization needed for simulations will be studied, These will be followed by CMOS logic gate design and different logic structures will be discussed. Dynamic logic, clocking strategies, I/O structures, memory, low power design will be reviewed. Design strategies, chip design options, design and verification tools, CMOS testing will also be covered. Project work will be complementing the theoretical knowledge given in the course. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Learning Outcomes |
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Course Description | MOS Transistor Theory, CMOS Processing Technology, Circuit Characterization, CMOS Logic Gate Design, CMOS Logic Structures, Dynamic Logic and Clocking Strategies, I/O Structures, Memory, Low Power VLSI Design, Design Strategies, Chip Design Options, Design and Verification Tools, CMOS Testing |
|
Core Courses | |
Major Area Courses |
X
|
|
Supportive Courses | ||
Media and Management Skills Courses | ||
Transferable Skill Courses |
Week | Subjects | Related Preparation | Learning Outcome |
1 | MOS Transistor Theory nMOS, pMOS, Threshold voltage, MOS Device Design Equations, MOS Transistor Model | Text book (Ch. 1&2) | |
2 | CMOS Processing Technology n-well, p-well, twin-tub, layout design rules, circuit elements, latch-up | Text book (Ch. 3&4) | |
3 | Circuit Characterization Resistance, capacitance, inductance estimation, switching characteristics, power dissipation, charge sharing, yield, scaling | Text book (Ch. 5&6) | |
4 | Low Power Design Clocking strategies, low voltage techniques | Text book (Ch. 5&6) | |
5 | CMOS Logic Gate Design Fan-in, fan-out, gate delays, transistor sizing, | Text book (Ch. 7) | |
6 | I/O Structures Input, output pads | Text book (Ch. 8) | |
7 | Physical Design of CMOS Logic Gates Complex logic gates layout | Text book (Ch. 9) | |
8 | Clocking Strategies System timing, single-phase logic structures, two-phase clocking, four-phase clocking, clock distribution | Text book (Ch. 9) | |
9 | Clocking Strategies System timing, single-phase logic structures, two-phase clocking, four-phase clocking, clock distribution | Text book (Ch. 10) | |
10 | Subsytem Design Structured design | Text book (Ch. 11) | |
11 | Memory Elements RAM, SRAM; DRAM, ROM, FIFO, LIFO structures | Text book (Ch. 12) | |
12 | Design Strategies Structured design | Text book (Ch. 13) | |
13 | Chip Design Options Programmable logic, standard-cell design, full-custom design | Text book (Ch. 14) | |
14 | Design and Verification Tools Behavioral synthesis, Layout synthesis, simulation | Text book (Ch. 14) | |
15 | CMOS Testing Fault models, design strategies for testing, chip and system level testing | Text book (Ch. 15) | |
16 | Review of the Semester |
Course Notes/Textbooks | - Neil Weste, David Harris, CMOS VLSI Design: A Circuits and Systems Perspective, Addison-Wesley, 4th Edition, 2010 , ISBN-10: 0321547748, ISBN-13: 978-0321547743 |
Suggested Readings/Materials | - Sung-Mo (Steve) Kang, Yusuf Leblebici, Chul Woo Kim, “CMOS Digital Integrated Circuits Analysis & Design”, McGraw-Hill Science/Engineering/Math; 4 edition, 2014, ISBN-10: 0073380628, ISBN-13: 978-0073380629 - Related Research Papers |
Semester Activities | Number | Weighting | LO 1 | LO 2 | LO 3 | LO 4 | LO 5 | LO 6 | LO 7 | LO 8 |
Participation | ||||||||||
Laboratory / Application | ||||||||||
Field Work | ||||||||||
Quizzes / Studio Critiques | ||||||||||
Portfolio | ||||||||||
Homework / Assignments |
5
|
30
|
||||||||
Presentation / Jury | ||||||||||
Project |
1
|
30
|
||||||||
Seminar / Workshop | ||||||||||
Oral Exams | ||||||||||
Midterm | ||||||||||
Final Exam |
1
|
40
|
||||||||
Total |
Weighting of Semester Activities on the Final Grade |
6
|
60
|
Weighting of End-of-Semester Activities on the Final Grade |
1
|
40
|
Total |
Semester Activities | Number | Duration (Hours) | Workload |
---|---|---|---|
Theoretical Course Hours (Including exam week: 16 x total hours) |
16
|
3
|
48
|
Laboratory / Application Hours (Including exam week: '.16.' x total hours) |
16
|
0
|
|
Study Hours Out of Class |
15
|
4
|
60
|
Field Work |
0
|
||
Quizzes / Studio Critiques |
0
|
||
Portfolio |
0
|
||
Homework / Assignments |
5
|
10
|
50
|
Presentation / Jury |
0
|
||
Project |
1
|
45
|
45
|
Seminar / Workshop |
0
|
||
Oral Exam |
0
|
||
Midterms |
0
|
||
Final Exam |
1
|
22
|
22
|
Total |
225
|
#
|
PC Sub | Program Competencies/Outcomes |
* Contribution Level
|
||||
1
|
2
|
3
|
4
|
5
|
|||
1 |
Accesses information in breadth and depth by conducting scientific research in Electrical and Electronics Engineering, evaluates, interprets and applies information. |
-
|
X
|
-
|
-
|
-
|
|
2 |
Is well-informed about contemporary techniques and methods used in Electrical and Electronics Engineering and their limitations. |
-
|
-
|
X
|
-
|
-
|
|
3 |
Uses scientific methods to complete and apply information from uncertain, limited or incomplete data, can combine and use information from different disciplines. |
-
|
-
|
X
|
-
|
-
|
|
4 |
Is informed about new and upcoming applications in the field and learns them whenever necessary. |
-
|
-
|
X
|
-
|
-
|
|
5 |
Defines and formulates problems related to Electrical and Electronics Engineering, develops methods to solve them and uses progressive methods in solutions. |
-
|
-
|
-
|
-
|
X
|
|
6 |
Develops novel and/or original methods, designs complex systems or processes and develops progressive/alternative solutions in designs. |
-
|
-
|
X
|
-
|
-
|
|
7 |
Designs and implements studies based on theory, experiments and modelling, analyses and resolves the complex problems that arise in this process. |
-
|
-
|
X
|
-
|
-
|
|
8 |
Can work effectively in interdisciplinary teams as well as teams of the same discipline, can lead such teams and can develop approaches for resolving complex situations, can work independently and takes responsibility. |
-
|
-
|
X
|
-
|
-
|
|
9 |
Engages in written and oral communication at least in Level B2 of the European Language Portfolio Global Scale. |
-
|
-
|
X
|
-
|
-
|
|
10 |
Communicates the process and the results of his/her studies in national and international venues systematically, clearly and in written or oral form. |
X
|
-
|
-
|
-
|
-
|
|
11 |
Is knowledgeable about the social, environmental, health, security and law implications of Electrical and Electronics engineering applications, knows their project management and business applications, and is aware of their limitations in Electrical and Electronics engineering applications. |
X
|
-
|
-
|
-
|
-
|
|
12 |
Highly regards scientific and ethical values in data collection, interpretation, communication and in every professional activity. |
X
|
-
|
-
|
-
|
-
|
*1 Lowest, 2 Low, 3 Average, 4 High, 5 Highest
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